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Low Voltage Microphone Preamplifier with Variable Compression and Noise Gating SSM2167
FEATURES
Complete microphone conditioner in a 10-lead package Single 3 V operation Low shutdown current < 2 A Adjustable noise gate threshold Adjustable compression ratio Automatic limiting feature prevents ADC overload Low noise and distortion: 0.2% THD + N 20 kHz bandwidth
PIN CONFIGURATION
GND 1 VCAIN 2 SHUTDOWN 3 BUFOUT 4 INPUT 5
10
VDD OUTPUT COMPRESSION RATIO
02628-001
SSM2167
TOP VIEW (Not to Scale)
9 8 7 6
GATE THRS AVG CAP
Figure 1. 10-Lead MSOP (RM Suffix)
APPLICATIONS
Desktop, portable, or palmtop computers Telephone conferencing Communication headsets Two-way communications Surveillance systems Karaoke and DJ mixers
DOWNWARD EXPANSION THRESHOLD (NOISE GATE)
LIMITING THRESHOLD (ROTATION POINT)
LIMITING REGION
OUTPUT (dB)
COMPRESSION REGION 1 r
VCA GAIN
GENERAL DESCRIPTION
The SSM2167 is a complete and flexible solution for conditioning microphone inputs in personal electronics and computer audio systems. It is also excellent for improving vocal clarity in communications and public address systems. A low noise voltage controlled amplifier (VCA) provides a gain that is dynamically adjusted by a control loop to maintain a set compression characteristic. The compression ratio is set by a single resistor and can be varied from 1:1 to over 10:1 relative to the fixed rotation point. Signals above the rotation point are limited to prevent overload and to eliminate popping. A downward expander (noise gate) prevents amplification of background noise or hum. This results in optimized signal levels prior to digitization, thereby eliminating the need for additional gain or attenuation in the digital domain. The flexibility of setting the compression ratio and the time constant of the level detector, coupled with two values of rotation point, make the SSM2167 easy to integrate in a wide variety of microphone conditioning applications. The device is available in a 10-lead MSOP package, and is guaranteed for operation over the extended industrial temperature range of -40C to +85C.
DOWNWARD EXPANSION REGION 1 1
VDE INPUT (dB)
VRP
Figure 2. General Input/Output Characteristics
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2001-2007 Analog Devices, Inc. All rights reserved.
02628-002
SSM2167 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Pin Configuration ............................................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 ESD Caution .................................................................................. 4 Typical Performance Characteristics ............................................. 5 Applications Information ................................................................ 8 Theory of Operation .................................................................... 8 Signal Path ......................................................................................8 Level Detector ................................................................................9 Control Circuitry...........................................................................9 Setting the Compression Ratio ....................................................9 Setting the Noise Gate Threshold (Downward Expansion) ............................................................ 10 Rotation Point (Limiting).......................................................... 10 Shutdown Feature....................................................................... 10 PCB Layout Considerations ...................................................... 10 Outline Dimensions ....................................................................... 11 Ordering Guide .......................................................................... 11
REVISION HISTORY
11/07--Rev. B to Rev. C Updated Format .................................................................. Universal Changes to PSRR .............................................................................. 3 Updated Outline Dimensions ....................................................... 11 Changes to Ordering Guide .......................................................... 11 9/03--Rev. A to Rev. B Deleted SSM2167-2 Model ................................................ Universal Changes to Ordering Guide ............................................................ 3 Edits to Figure 2 and Figure 3 ......................................................... 6 Updated Outline Dimensions ......................................................... 9 3/02--Rev. 0 to Rev. A Edits to Specifications .......................................................................2 Edits to Figure 2 and Figure 3 ..........................................................6 7/01--Revision 0: Initial Version
Rev. C | Page 2 of 12
SSM2167 SPECIFICATIONS
VS = 3.0 V, f = 1 kHz, RL = 100 k, RCOMP = 0 , TA = 25C, VIN = 100 mV rms, RGATE = 2 k, unless otherwise noted. Table 1.
Parameter AUDIO SIGNAL PATH Voltage Noise Density Noise Total Harmonic Distortion + Noise Input Impedance Output Impedance Load Drive Input Voltage Range Output Voltage Range Gain Bandwidth Product CONTROL SECTION VCA Dynamic Gain Range VCA Fixed Gain Compression Ratio, Minimum Compression Ratio, Maximum Rotation Point Noise Gate Range POWER SUPPLY Supply Voltage Supply Current DC Output Voltage Power Supply Rejection Ratio SHUTDOWN Supply Current Symbol en THD + N ZIN ZOUT Conditions 10:1 compression 20 kHz bandwidth, VIN = GND VIN = 100 mV rms Min Typ 20 -70 0.2 100 145 5 2 600 700 1 40 18 1:1 10:1 63 -40 2.5 2.3 1.4 45 2 5.5 5 Max Unit nV/Hz dBV % k k nF mV rms mV rms MHz dB dB
Minimum resistive load Maximum capacitive load 0.4% THD + N 0.4% THD + N 1:1 compression, VCA G = 18 dB
See Table 4 for RCOMP Maximum threshold VSY ISY PSRR ISY VSY = 2.5 V to 6 V Pin 3 = GND
mV rms dBV V mA V dB A
8
Rev. C | Page 3 of 12
SSM2167 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Supply Voltage Input Voltage Operating Temperature Range Junction Temperature Lead Temperature (Soldering, 10 sec) 883 (Human Body) Model Rating 6V 6V -40C to +85C 150C 300C 500 V
THERMAL RESISTANCE
JA is specified for worst-case conditions, that is, JA is specified for device soldered in 4-layer circuit board for surface-mount packages. Table 3.
Package Type 10-Lead MSOP (RM) JA 180 JC 35 Unit C/W
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Rev. C | Page 4 of 12
SSM2167 TYPICAL PERFORMANCE CHARACTERISTICS
100 TA = 25C V+ = 3V RLOAD = 100k COMPRESSION RATIO 2:1 ROTATION POINT = 63mV rms
1
NOISE GATE (mV rms)
THD + N (%)
10
0.1
0
500
1000
1500
2000
2500
3000
3500
02628-003
0.1 INPUT VOLTAGE (V rms)
1
RGATE ()
Figure 3. Noise Gate vs. RGATE
Figure 6. THD + N vs. Input
1
TA = 25C V+ = 3V VIN = 24.5mV rms COMPRESSION RATIO 1:1 ROTATION POINT = 63mV rms NOISE GATE SETTING = 1.4V rms
OUTPUT (dBV)
0 COMPRESSION RATIO 10:1 -10 -20 COMPRESSION RATIO 5:1 -30 COMPRESSION RATIO 2:1 -40 COMPRESSION RATIO 1:1 -50 -60 -70 TA = 25C V+ = 3V RLOAD = 100k ROTATION POINT = 63mV rms NOISE GATE SETTING = 1.4V rms -70 -60 -50 -40 -30 -20 -10
02628-007
02628-008
THD + N (%)
0.1
100
1k FREQUENCY (Hz)
10k
30k
02628-004
0.01 20
-80 -80
INPUT (dBV)
Figure 4. THD + N vs. Frequency
Figure 7. Output vs. Input Characteristics
35 30 25 20
PSRR (dB)
GAIN (dB)
-10 -20 -30 -40 -50 -60 VIN = 2mV rms RCOMP = 175k ROTATION POINT = 63mV rms NOISE GATE SETTING = 1.4V rms
02628-005
V+ = 3V + 0.1 RGATE = 5k RCOMP = 0V
15 10 5 0 -5 -10 -15 1k
-70 -80 10
10k
100k FREQUENCY (Hz)
1M
10M
100
1k FREQUENCY (Hz)
10k
100k
Figure 5. GBW Curves vs. VCA Gain
Figure 8. PSRR vs. Frequency
Rev. C | Page 5 of 12
02628-006
1
0.01 0.01
TA = 25C V+ = 3V VIN FREQUENCY = 1kHz RLOAD = 100k COMPRESSION RATIO 1:1 ROTATION POINT = 63mV rms NOISE GATE SETTING = 1.4V rms
SSM2167
VOLTAGE (50mV/DIV)
TA = 25C CSYS = 10F SYSTEM GAIN = 19dB RLOAD = 100k COMPRESSION RATIO 1:1
VOLTAGE (50mV/DIV)
TA = 25C CSYS = 10F SYSTEM GAIN = 8dB RLOAD = 100k COMPRESSION RATIO 1:1
02628-009
TIME (10s/DIV)
TIME (10s/DIV)
Figure 9. Small Signal Transient Response
Figure 11. Small Signal Transient Response
VOLTAGE (500mV/DIV)
TA = 25C CSYS = 10F SYSTEM GAIN = 8.6dB RLOAD = 100k COMPRESSION RATIO 1:1
VOLTAGE (200mV/DIV)
TA = 25C CSYS = 10F SYSTEM GAIN = 2.6dB RLOAD = 100k COMPRESSION RATIO 1:1
02628-010
TIME (10s/DIV)
TIME (10s/DIV)
Figure 10. Large Signal Transient Response
Figure 12. Large Signal Transient Response
Rev. C | Page 6 of 12
02628-012
02628-011
SSM2167
VOLTAGE (100mV/DIV)
-6dBV
VOLTAGE (100mV/DIV)
-6dBV
-66dBV -85dBV
-66dBV -85dBV
02628-013
TIME (1s/DIV)
TIME (500ms/DIV)
Figure 13. RMS Level Detector Performance with CAVG = 22 F
Figure 15. RMS Level Detector Performance with CAVG = 2.2 F
VOLTAGE (100mV/DIV)
-6dBV
-66dBV -85dBV
TIME (500ms/DIV)
Figure 14. RMS Level Detector Performance with CAVG = 2.2 F
02628-014
Rev. C | Page 7 of 12
02628-015
SSM2167 APPLICATIONS INFORMATION
The SSM2167 is a complete microphone signal conditioning system on a single integrated circuit. Designed primarily for voice-band applications, this integrated circuit provides amplification, limiting, variable compression, and noise gate. User adjustable compression ratio, noise gate threshold, and two different fixed gains optimize circuit operation for a variety of applications. The SSM2167 also features a low power shutdown mode for battery-powered applications.
VDD +
10
The breakpoint between the compression region and the limiting region is referred to as the limiting threshold or the rotation point. The term, rotation point, derives from the observation that the straight line in the compression region rotates about this point on the input/output characteristic as the compression ratio is changed. The gain of the system with an input signal level of VRP is the fixed gain, 18 dBV for the SSM2167, regardless of the compression ratio. Input signals below VDE are downward expanded; that is, a -1 dB change in the input signal level causes approximately a -3 dB change in the output level. As a result, the gain of the system is small for very small input signal levels, even though it may be quite large for small input signals above VDE. The external resistor at Pin 7, RGATE, is used to set the downward expansion threshold (VDE). Finally, the SSM2167 provides an active low, CMOS-compatible digital power-down feature that reduces device supply current to typically less than 2 A.
10F
+
1
9
OUTPUT 100k VDD
10F GND 10F
4 2
SSM2167
RGATE
7
VDD
500k
3 5 6
8
RCOMP
SHUTDOWN INPUT 0.1F
SIGNAL PATH
Figure 17 illustrates the block diagram of the SSM2167. The audio input signal is processed by the input buffer and then by the VCA. The input buffer presents an input impedance of approximately 100 k to the source. A dc voltage of approximately 1.5 V is present at INPUT (Pin 5) of the SSM2167, requiring the use of a blocking capacitor (C1) for ground-referenced sources. A 0.1 F capacitor is a good choice for most audio applications. The input buffer is a unity-gain stable amplifier that can drive the low impedance input of the VCA and an internal rms detector. The VCA is a low distortion, variable gain amplifier whose gain is set by the side-chain control circuitry. An external blocking capacitor (C2) must be used between the buffer output and the VCA input. The 1 k impedance between amplifiers determines the value of this capacitor, which is typically between 4.7 F and 10 F. An aluminum electrolytic capacitor is an economical choice. The VCA amplifies the input signal current flowing through C2 and converts this current to a voltage at the output pin (Pin 9) of the SSM2167. The net gain from input to output can be as high as 40 dB, depending on the gain set by the control circuitry. The output impedance of the SSM2167 is typically less than 145 , and the external load on Pin 9 should be >5 k. The nominal output dc voltage of the device is approximately 1.4 V; therefore, a blocking capacitor for grounded loads must be used. The bandwidth of the SSM2167 is quite wide at all gain settings. The upper 3 dB point is over 1 MHz at gains as high as 30 dB. The GBW plots are shown in Figure 5. The lower 3 dB cutoff frequency of the SSM2167 is set by the input impedance of the VCA (1 k) and C2. Whereas the noise of the input buffer is fixed, the input-referred noise of the VCA is a function of gain. The VCA input noise is designed to be at a minimum when the gain is at a maximum, thereby maximizing the usable dynamic range of the part.
02628-016
10F
+
GND
Figure 16. Typical Application Circuit
VDD
C2 10F
BUFOUT 1k INPUT
+
VCAIN 1k VCA OUTPUT NOISE GATE AND COMPRESSION SETTINGS
+
+1 BUFFER LEVEL DETECTOR
C1 0.1F
CONTROL
Figure 17. Functional Block Diagram
THEORY OF OPERATION
The typical transfer characteristic for the SSM2167 is shown in Figure 2 where the output level in dB is plotted as a function of the input level in dB. The dotted line indicates the transfer characteristic for a unity-gain amplifier. For input signals in the range of VDE (downward expansion) to VRP (rotation point), an "r" dB change in the input level causes a 1 dB change in the output level. Here, r is defined as the compression ratio. The compression ratio may be varied from 1:1 (no compression) to 10:1 via a single resistor, RCOMP. Input signals above VRP are compressed with a fixed compression ratio of approximately 10:1. This region of operation is the limiting region. Varying the compression ratio has no effect on the limiting region.
Rev. C | Page 8 of 12
02628-017
CAVG C3 SHUTDOWN GND 10F
+
RG
RC
VDD
SSM2167
LEVEL DETECTOR
The SSM2167 incorporates a full-wave rectifier and a true rms level detector circuit whose averaging time constant is set by an external capacitor (CAVG) connected to the AVG CAP (Pin 6). For optimal low frequency operation of the level detector down to 10 Hz, the value of the capacitor should be 2.2 F. Some experimentation with larger values for CAVG may be necessary to reduce the effects of excessive low frequency ambient background noise. The value of the averaging capacitor affects sound quality: too small a value for this capacitor may cause a pumping effect for some signals, whereas too large a value can result in slow response times to signal dynamics. Electrolytic capacitors are recommended here for lowest cost and should be in the range of 2 F to 22 F. The rms detector filter time constant is approximately given by 10 x CAVG milliseconds where CAVG is in F. This time constant controls both the steady state averaging in the rms detector as well as the release time for compression; that is, the time it takes for the system gain to increase due to a decrease in input signal. The attack time, the time it takes for the gain to be reduced because of a sudden increase in input level, is controlled mainly by internal circuitry that speeds up the attack for large level changes. In most cases, this limits overload time to less than 1 ms. The performance of the rms level detector is illustrated in Figure 14 for a CAVG of 2.2 F and Figure 13 for a CAVG of 22 F. In Figure 13, Figure 14, and Figure 15, the input signal to the SSM2167 (not shown) is a series of tone bursts in six successive 10 dB steps. The tone bursts range from -66 dBV (0.5 mV rms) to -6 dBV (0.5 V rms). As illustrated in these figures, the attack time of the rms level detector is dependent only on CAVG, but the release times are linear ramps whose decay times are dependent on both CAVG and the input signal step size. The rate of release is approximately 240 dB/s for a CAVG of 2.2 F, and 12 dB/s for a CAVG of 22 F.
15:1 5:1 2:1 OUTPUT (dB) 1:1 VCA GAIN
1 1
VDE
INPUT (dB)
VRP
Figure 18. Effect of Varying the Compression Ratio
SETTING THE COMPRESSION RATIO
Changing the scaling of the control signal fed to the VCA causes a change in the circuit compression ratio, r. This effect is shown in Figure 18. Connecting a resistor (RCOMP) between Pin 8 and VDD sets the compression ratio. Lowering RCOMP gives smaller compression ratios as indicated in Table 4. AGC performance is achieved with compression ratios between 2:1 and 10:1, and is dependent on the application. Shorting RCOMP disables the AGC function, setting the compression equal to 1:1. If using a compression resistor, using a value greater than 5 k is recommended. If lower than 5 k is used, the device may interpret this as a short, 0 . Table 4. Setting Compression Ratio
Compression Ratio 1:1 2:1 3:1 5:1 10:1 Value of RCOMP 0 (short to V+) 15 k 35 k 75 k 175 k
CONTROL CIRCUITRY
The output of the rms level detector is a signal proportional to the log of the true rms value of the buffer output with an added dc offset. The control circuitry subtracts a dc voltage from this signal, scales it, and sends the result to the VCA to control the gain. The gain control of the VCA is logarithmic--a linear change in control signal causes a dB change in gain. It is this control law that allows linear processing of the log rms signal to provide the flat compression characteristic on the input/output characteristic shown in Figure 2.
Rev. C | Page 9 of 12
02628-018
SSM2167
SETTING THE NOISE GATE THRESHOLD (DOWNWARD EXPANSION)
The noise gate threshold is a programmable point using an external resistor (RGATE) that is connected between Pin 7 (GATE THRS) and VDD. The downward expansion threshold may be set between -40 dBV and -55 dBV, as shown in Table 5. The downward expansion threshold is inversely proportional to the value of this resistance: setting this resistance to 0 sets the threshold at approximately 10 mV rms (-40 dBV), whereas a 5 k resistance sets the threshold at approximately 1 mV rms (-55 dBV). This relationship is illustrated in Figure 19. It is not recommended to use more than 5 k for the RGATE resistor because the noise floor of the SSM2167 prevents the noise gate from being lowered further without causing problems. Table 5. Setting Noise Gate Threshold
Noise Gate (dBV) -40 -48 -54 -55 Value of RGATE 0 (short to V+) 1 k 2 k 5 k
ROTATION POINT (LIMITING)
Input signals above a particular level, the rotation point, are attenuated (limited) by internal circuitry. This feature allows the SSM2167 to limit the maximum output, preventing clipping of the following stage, such as a codec or ADC. The rotation point for SSM2167 is set internally to -24 dBV (63 mV rms).
SHUTDOWN FEATURE
The supply current of the SSM2167 can be reduced to under 10 A by applying an active low, 0 V CMOS-compatible input to the SHUTDOWN pin (Pin 3) of the SSM2167. In this state, the input and output circuitry of the SSM2167 assumes a high impedance state; as such, the potentials at the input pin and the output pin are determined by the external circuitry connected to the SSM2167. The SSM2167 takes approximately 200 ms to settle from a shutdown to power-on command. For power-on to shutdown, the SSM2167 requires more time, typically less than 1 sec. Cycling the power supply to the SSM2167 can result in quicker settling times: the off-to-on settling time of the SSM2167 is less than 200 ms, whereas the on-to-off settling time is less than 1 ms. The SSM2167 shutdown current is related to both temperature and voltage.
PCB LAYOUT CONSIDERATIONS
Because the SSM2167 is capable of wide bandwidth operation and can be configured for as much as 60 dB of gain, special care must be exercised in the layout of the PCB that contains the IC and its associated components. The following applications hints should be considered for the PCB. The layout should minimize possible capacitive feedback from the output of the SSM2167 back to its input. Do not run input and output traces adjacent to each other.
1 1 VDE2 VDE1 VDE3 VRP INPUT (dB)
r:1
OUTPUT (dB)
VCA GAIN
Figure 19. Effects of Varying the Downward Expansion (Noise Gate) Threshold
A single-point (star) ground implementation is recommended in addition to maintaining short lead lengths and PCB runs. In applications where an analog ground and a digital ground are available, the SSM2167 and its surrounding circuitry should be connected to the analog ground of the system. As a result of these recommendations, wire-wrap board connections and grounding implementations are to be explicitly avoided.
02628-019
Rev. C | Page 10 of 12
SSM2167 OUTLINE DIMENSIONS
3.10 3.00 2.90 3.10 3.00 2.90 PIN 1 0.50 BSC 0.95 0.85 0.75 0.15 0.05 0.33 0.17 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA 1.10 MAX 8 0 0.80 0.60 0.40
10 6
1
5
5.15 4.90 4.65
SEATING PLANE
0.23 0.08
Figure 20. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters
ORDERING GUIDE
Model SSM2167-1RM-REEL SSM2167-1RM-R2 SSM2167-1RMZ-REEL 1 SSM2167-1RMZ-R21 SSM2167-EVAL
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 10-Lead MSOP 10-Lead MSOP 10-Lead MSOP 10-Lead MSOP Evaluation Board
Package Option RM-10 RM-10 RM-10 RM-10
Branding B11 B11 B11# B11#
Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked.
Rev. C | Page 11 of 12
SSM2167 NOTES
(c)2001-2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02628-0-11/07(C)
Rev. C | Page 12 of 12

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